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NXP Semiconductors /MIMXRT1011 /PMU /REG_3P0_CLR

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Interpret as REG_3P0_CLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENABLE_LINREG)ENABLE_LINREG 0 (ENABLE_BO)ENABLE_BO 0 (ENABLE_ILIMIT)ENABLE_ILIMIT 0BO_OFFSET 0 (USB_OTG2_VBUS)VBUS_SEL 0 (OUTPUT_TRG_0)OUTPUT_TRG0 (BO_VDD3P0)BO_VDD3P0 0 (OK_VDD3P0)OK_VDD3P0

OUTPUT_TRG=OUTPUT_TRG_0, VBUS_SEL=USB_OTG2_VBUS

Description

Regulator 3P0 Register

Fields

ENABLE_LINREG

Control bit to enable the regulator output to be set by the programmed target voltage setting and internal bandgap reference
ENABLE_BO

Control bit to enable the brownout circuitry in the regulator.
ENABLE_ILIMIT

Control bit to enable the current-limit circuitry in the regulator.
BO_OFFSET

Control bits to adjust the regulator brownout offset voltage in 25mV steps
VBUS_SEL

Select input voltage source for LDO_3P0 from either USB_OTG1_VBUS or USB_OTG2_VBUS

0 (USB_OTG2_VBUS): Utilize VBUS OTG2 power

1 (USB_OTG1_VBUS): Utilize VBUS OTG1 power
OUTPUT_TRG

Control bits to adjust the regulator output voltage

0 (OUTPUT_TRG_0): 2.625V

15 (OUTPUT_TRG_15): 3.000V

31 (OUTPUT_TRG_31): 3.400V
BO_VDD3P0

Status bit that signals when a brownout is detected on the regulator output.
OK_VDD3P0

Status bit that signals when the regulator output is ok. 1 = regulator output > brownout target

Links

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Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data